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FPGA实现串口发送数据

2021/8/20 15:29:38 浏览:

FPGA实现串口发送数据

module Tcmc(
    ctrl,
    CLK,
    Time,
    Reset_n,
    Led
    );
    input CLK;
    input [31:0]Time;
    input [7:0]ctrl;
    input Reset_n;
    output reg Led;
    
    reg  [31:0]counter;
    always@(posedge CLK or negedge Reset_n)  
    if(!Reset_n)
        counter <= 0 ;
    else if(counter == Time-1)
        counter <= 0 ;
    else
        counter<=counter+1'b1;
    
    reg  [2:0]counter2;
    always@(posedge CLK or negedge Reset_n)  
    if(!Reset_n)
        counter2 <= 0 ;
    else if(counter == Time-1)
        counter2 <= counter2+1'b1 ;
    
     always@(posedge CLK or negedge Reset_n)  
    if(!Reset_n)
        Led <= 0 ;
    else case(counter2)
    0:Led <= ctrl[0];
    1:Led <= ctrl[1];
    2:Led <= ctrl[2];
    3:Led <= ctrl[3];
    4:Led <= ctrl[4];
    5:Led <= ctrl[5];
    6:Led <= ctrl[6];
    7:Led <= ctrl[7];
    default: Led <=Led;
    endcase
    
    
endmodule

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